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Dr. Kishor P. Sarawadekar
Assistant Professor
Department of Electronics Engineering Indian Institute of Technology
Area of Interest: 
Algorithms and Architectures for Image/Video Signal Processing, Image Coding Systems, Biomedical Image Processing and VLSI Based Signal Processing

Ph.D. (Electronics and Electrical Communication Engineering) 
Dissertation: VLSI Based Performance Enhancement of Image Processing Units for an Ultrasound System,
Indian Institute of Technology, Kharagpur, 2012.

M. Tech. (Electronics and Electrical Communucation Engineering),
Specialization: VLSI Design and Microelectronics Engineering, 
Indian Institute of Technology, Kharagpur, 2007.

B. Tech. (Electronics Engineering),
Shivaji University, Kolhapur, Maharashtra, 1996.

  • Assistant Professor        Indian Institute of Technology, Varanasi                               Since June 2014 
  • Assistant Professor            Defence Institute of Advanced Technology, Pune                           Oct. 2013 - May 2014
  • Software Engineer-II         Xilinx India Technology Services Pvt. Ltd., Hyderabad                    July 2011  - Sept.2013
  • Sr. Research Fellow           SRIC - IIT Kharagpur                                                                  Dec. 2007 - June 2011
  • Lecturer                           Don Bosco Institute of Technology, Kurla, Mumbai                         July  2002 - Dec. 2007
  • Design Engineer                V3 Logic Pvt. Ltd., Pune                                                              July  2001 - June 2002
  • Lecturer                           Vidhyavardhini’s College of Engineering, Mumbai                           July  1998 - Feb. 2001
  • Marketing Executive          Vinit Electronics Pvt. Ltd., Pune                                                    May 1997 - July 1998

Fall 2018:

  • EC 522: Switching Theory and Logic Design
  • EO 301: Digital Circuits and Systems
  • H 101: Universal Human Values 

Spring 2018:

  • EC 562: Digital Designing and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Fall 2017:

  • EO 301: Digital Circuits and Systems

Journal Publications:

  • Subiman Chatterjee and Kishor Sarawadekar, “An Optimized Architecture of HEVC Core Transform using Real-Valued DCT Coefficients,” IEEE Transactions on Circuits and Systems--II: Express Briefs, Accepted for publication, Early Access, DOI: 10.1109/TCSII.2018.2815532
  • Gourav Modanwal and Kishor Sarawadekar, “A Robust Wrist Point Detection Algorithm using Geometric Features,” Pattern Recognition Letters, vol. 110, pp. 72–78, July 2018
  • Gourav Modanwal and Kishor Sarawadekar, “A New Dactylology and Interactive System Development for Blind–Computer Interaction,” IEEE Transactions on Human-Machine Systems, vol. 48, no. 2, pp. 207–212, April 2018.
  • Gourav Modanwal and Kishor Sarawadekar, “Towards hand gesture based writing support system for blinds,” Pattern Recognition, vol. 57, pp. 50–60, Sept. 2016
  • Kishor Sarawadekar, R. Biswas, Srinivas Varna and S. Banerjee, “An FPGA-based architecture of DSC–SRI units specially for motion blind ultrasound systems,” Journal of Real Time Image Processing, vol. 10, issue 3, pp 573 - 595, 2015
  • Kishor Sarawadekar and S. Banerjee, “Area Efficient, High Speed EBCOT Architecture for Digital Cinema,” ISRN Signal Processing, vol. 2012, Article ID 714176, DOI: 10.5402/2012/714176
  • Kishor Sarawadekar, D. Bera, H. B. Indana, and S. Banerjee, “VLSI-DSP based real time solution of DSC-SRI for an ultrasound system,” Journal of Embedded Hardware Design (Microprocessors and Microsystems), vol. 36, no. 1, pp. 1–12, Feb. 20122
  • Kishor Sarawadekar and S. Banerjee, “VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000,” Integration, the VLSI Journal, vol. 45, no. 1, pp. 1–8, Jan. 2012
  • Kishor Sarawadekar and S. Banerjee, “An efficient pass-parallel architecture for embedded block coder in JPEG 2000,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 21, no. 6, pp. 825–836, Jun. 2011

Conference Publications:

  • Rahul Srivastava and Kishor Sarawadekar, “Multi-Voltage GPIO Design and its Physical Implementation,” in the IEEE Sponsored 4’th International Conference for Convergence in Technology (I2CT) 2018, Mangalore, Karnataka, Accepted for Publication.
  • Jaydeep Banik Mazumdar and Kishor Sarawadekar, “Design and Physical Implementation of a Low Frequency On-Chip Oscillator,” in the 10th International Conference on Information Technology and Electrical Engineering, Bali, Indonesia, Accepted for Publication.
  • Gourav Modanwal and Kishor Sarawadekar, “A Gesture Elicitation Study with Visually Impaired Users,” in the 20th International Conference on Human-Computer Interaction Las Vegas, Accepted for Publication
  • Gourav Modanwal and Kishor Sarawadekar, “A Robust Algorithm for Hand-forearm Segmentation,” in the International Conference on Image and Graphics Processing (ICIGP 2018), Hong Kong, February 24-26, 2018
  • Subiman Chatterjee and Kishor Sarawadekar, “Constant Throughput HEVC Core Transform Design,” in 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, October 2016
  • Subiman Chatterjee and Kishor Sarawadekar, “A Low Cost, Constant Throughput and Reusable 8X8 DCT Architecture for HEVC,” in 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, October 2016
  • Gourav Modanwal and Kishor Sarawadekar, “Development of a New Dactylology and Writing Support System Especially for Blinds,” in 13th International Conference on Computer and Robot Vision, Victoria, British Columbia, Canada, June 2016, 362-369
  • Kishor Sarawadekar, R. Biswas, and S. Banerjee, “DSC-SRI algorithms for motion blind detection of objects in an ultrasound system,” in The IASTED International Symposia on Imaging and Signal Processing in Healthcare Technology (ISPHT’11), Washington DC, USA, May 2011, pp. 69-76
  • Kishor Sarawadekar, O. Kulkarni, and S. Banerjee, “VLSI implementation of MQ decoder in JPEG 2000,” in IEEE Students’ Technology Symposium (TechSym’11), IIT Kharagpur, India, Jan. 2011, pp. 193-197
  • Kishor Sarawadekar and S. Banerjee, “Low-cost, high-performance VLSI design of an MQ coder for JPEG 2000,” in 10th IEEE International Conference on Signal Processing (ICSP’10), Beijing, China, Oct. 2010, pp. 397–400
  • Kishor Sarawadekar and S. Banerjee, “Area efficient, high-speed VLSI design for EBCOT block coder in JPEG 2000,” in IEEE International Conference on Electronics and Information Engineering (ICEIE’10), Kyoto, Japan, Aug. 2010, pp. V2–110–V2–113
  • Kishor Sarawadekar and S. Banerjee, “Efficient VLSI architecture for bit plane encoder of JPEG 2000,” in IEEE International Conference on Image Processing (ICIP’09), Cairo, Egypt, Nov. 2009, pp. 2805 – 2808
  • Kishor Sarawadekar and S. Banerjee, “A high speed bit plane coder for JPEG 2000 and its FPGA implementation,” in 17th European Signal Processing Conference (EUSIPCO’09), Glasgow, Scotland, Aug. 2009, pp. 2231 – 2234 
  • Invited Speaker (for initial two days), "Introduction to High Efficiency Video Coding Algorithm and VLSI Design of the Core Transform used in it", in TEQIP-III sponsored Five Day Short Term Training Program on Algorithms and Architectures for High Efficiency Video Processing Systems, at NIT Surathkal, Karnataka, August 20-24, 2018.
  • Expert Lecture, “ZynQ Architecture and AXI Interconnect,” in TEQIP-III sponsored one-week FDP on Emerging Issues in VLSI Design, at SMVDU, J&K, May 7-11, 2018.
  • Invited Speech, “Towards hand gesture based writing support system for blinds,” The 4th Annual Global Congress of Knowledge Economy-2017, Qingdao, China,  September 19-21, 2017.
  • Invited Speaker, “Selecting the Right Processing Platform for Medical Applications,” 11th world Congress of Regenerative Medicine and Stem Cell (RMSC-2017), Singapore, November 14-16, 2017.
  • Member, Doctoral Committee for a Research Scholar at the SRM University, Chennai since January, 2017.
  • Keynote Speaker and Session Chair in the International Conference on Cognitive Informatics and Soft Computing held at VBIT, Ghatkesar, Hyderabad, December 20-21, 2017.
  • Invited Talk, “Scientific Writing using LaTeX” in a UGC-Sponsored Workshop, at SMVDU, J&K, February 24, 2017.
  • TPC Member, IEEE International Symposium on Nanoelectronic and Information Systems (IEEE-iNIS), Gwalior, India, December 19-21, 2016.
  • Session Chair, Digital Integrated Circuits 2 Track, 2016 IEEE 59th Midwest Symposium on Circuits and Systems (MWCAS), Abu Dhabi, UAE.
  • Invited Expert (for initial four days) in a workshop on “Smart Embedded VLSI System and Hands on Training,” Shivaji University, Kolhapur, Maharashtra (September 29 to October 5, 2016).
  • Invited Expert (for initial four days) “FPGA Implementation and VLSI for Image Processing,” in a National two week STTP on “Recent Trends in VLSI and Embedded Systems” held at MITCOE, Pune, June 27-30, 2016.
  • Invited Talk, “FPGA Architecture,” SSGMCE, Shegaon Maharashtra, August 27, 2015
  • Invited Expert Lecture, “FPGA Architecture,” HVPM’s CoE, Amaravati, Maharashtra, August 28, 2015
  • Invited Expert, Research Symposium-II, at SGGS Institute of Engineering and Technology, Nanded, Maharashtra, July 25-26, 2015.
  • Conducted a short term course on “VHDL Syntax and Applications” in Jawaharlal Darda Institute of Engineering and Technology, Yatmal, Maharashtra, June 8-12, 2015.
  • Member, Board of Studies in Electronics, Industrial Electronics and Applied Electronics at the Sant Gadge Baba Amravati University, Amravati, Maharashtra, September 1, 2012 – July 08, 2015. 

Short Term Courses Conducted:

  • AICTE Sponsored Short Term Course (and CEP) on “HDL for Signal, Image and Video Processing (HSIVP),” August 21 - 26, 2017.
  • Faculty Development Programme on “VHDL Syntax and Applications,” in Jawaharlal Darda Institute of Engineering and Technology, Yatmal, Maharashtra, June 8-12, 2015.

General Administration:

  • Nodal Officer, Visvesvaraya PhD Scheme, Ministry of Electronics and Information Technology, New Delhi, Since December 2014
  • Co-Chief Investigator, Special Manpower Development Programme for Chips to System Design (SMDP-C2SD), Ministry of Electronics and Information Technology, New Delhi, Since April 2017
  • Treasurer, Faculty Forum, Since July 28, 2018
  • Dean’s Nominee, Project Staff Selection Committee, Since June 2018
  • Member, Institute Research Project/Grant to Individual Faculty Scheme,Since December 2017
  • Convenor, Departmental Under Graduate Committee, Since September 2018
  • Member, Projected Annual Expenditure Plan from Department Development Fund of Special Fund, Since July 2016
  • Chairman, User Group-Cum-Monitoring Committee, Since September 2016
  • Member, Departmental Purchase Committee, Financial Year 2016-17
  • Member, Departmental Physical Verification Committee, Since August 2015
  • Faculty Instructor, Turnitin Software, Since October 2016
  • Administrative Warden, Morvi Hostel, Since September 2016
  • Member, Departmental Library Committee,
  • Lab In-Charge, Tinkering Lab, VLSI Lab, Digital Circuits Lab, PGS&R Lab
  • Member, Departmental Post Graduate Committee, Since Academic Year 2017-18
  • Warden, Morvi Hostel, November 2014 to September 2016
  • Member, Departmental New Curriculum Committee, Academic Year 2014-15
  • Ex-Vice President, Departmental Electronics Engineering Society, Academic Year 2014-17
  • Ex-Member, Departmental Under Graduate Committee, Academic Year 2015-17
  • General Chair and Organizing Secretary, International Conference on Distributed Computing and Networking (ICDCN), 2018


  • Aditya Kumar Agrawal


5. Yedukondala Rao (QIP)
4. Sumit Kumar Yadav 
3. Purnendu Mishra 
2. Gourav Modanwal​​
1. Subiman Chatterjee 


7. Jaydeep Banik Mazumdar
6. Rahul Srivastava

5. Bade Pawan Kumar
4. Suresh Kumar Patel

3. Krishan Mohan Sharma
2. Nisha
1. Harendra Kumar Netam


  • Recipient of Visvesvaraya Young Faculty Research Fellowship for the period of May 2016 to April 2018
  • Sr. Research Fellowship, GE Medical Systems India Private Ltd., Bangalore during research period December 2007 - March 2011


  • II’nd place award for best Ph. D. thesis presentation in the Ph. D. forum, VLSI Design and Test Symposium 2012, B.E.S.U., Kolkata
  • Recognized as an "Outstanding Scientist in Electronics Engineering" under the Engineering Discipline by the Venus International Foundation, Chennai