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Dr. Kishor P. Sarawadekar

Associate Professor
Department of Electronics Engineering Indian Institute of Techn
Phone No(s): +91-9838764487
Email: skishor.ece@iitbhu.ac.in
Area of Interest: Algorithms and Architectures for Image/Video Signal Processing, Image Coding Systems, Biomedical Image Processing and VLSI Based Signal Processing
                    Vist my Website

Ph.D. (Electronics and Electrical Communication Engineering) 
Dissertation: VLSI Based Performance Enhancement of Image Processing Units for an Ultrasound System,
Indian Institute of Technology, Kharagpur, 2012.

M. Tech. (Electronics and Electrical Communication Engineering),
Specialization: VLSI Design and Microelectronics Engineering, 
Indian Institute of Technology, Kharagpur, 2007.

B. Tech. (Electronics Engineering),
Shivaji University, Kolhapur, Maharashtra, 1996.

  • Associate Professor       Indian Institute of Technology, Varanasi                           Since September 2023 
  • Assistant Professor           Indian Institute of Technology, Varanasi                                June 2014 - Sept. 2023
  • Assistant Professor           Defence Institute of Advanced Technology, Pune                  Oct. 2013 - May 2014
  • Software Engineer-II         Xilinx India Technology Services Pvt. Ltd., Hyderabad          July 2011  - Sept.2013
  • Sr. Research Fellow         SRIC - IIT Kharagpur                                                              Dec. 2007 - June 2011
  • Lecturer                            Don Bosco Institute of Technology, Kurla, Mumbai                 July  2002 - Dec. 2007
  • Design Engineer               V3 Logic Pvt. Ltd., Pune                                                         July  2001 - June 2002
  • Lecturer                            Vidhyavardhini’s College of Engineering, Mumbai                  July  1998 - Feb. 2001
  • Marketing Executive         Vinit Electronics Pvt. Ltd., Pune                                              May 1997 - July 1998

Session 2024-25 (Odd Semester):

  • EC 421: Advanced Digital Design 
  • EC 522: Switching Theory and Logic Design

Session 2023-24 (Even Semester):

  • EC 562: Digital Design and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Session 2023-24 (Odd Semester):

  • EC 421: Advanced Digital Design 
  • EC 522: Switching Theory and Logic Design

Session 2022-23 (Even Semester):

  • EC 426: Logical Design of Digital Systems
  • EC 562: Digital Design and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Session 2022-23 (Odd Semester):

  • EC 421: Advanced Digital Design 
  • EC 522: Switching Theory and Logic Design

Session 2021-22 (Even Semester):

  • EC 562: Digital Design and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Session 2021-22 (Odd Semester):

  • EC 421: Advanced Digital Design 
  • EC 522: Switching Theory and Logic Design

Session 2020-21 (Even Semester):

  • EO 301: Digital Circuits and Systems
  • EC 562: Digital Design and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Session 2020-21 (Odd Semester):

  • EO 301: Digital Circuits and Systems
  • EC 522: Switching Theory and Logic Design

Session 2019-20 (Even Semester):

  • EC 424: Digital Image processing
  • EC 562: Digital Design and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Session 2019-20 (Odd Semester):

  • EO 301: Digital Circuits and Systems
  • EC 522: Switching Theory and Logic Design

Session 2018-19 (Even Semester):

  • EC 424: Digital Image processing
  • EC 562: Digital Design and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Session 2018-19 (Odd Semester):

  • EC 522: Switching Theory and Logic Design
  • EO 301: Digital Circuits and Systems
  • H 101: Universal Human Values 

Session 2017-18 (Even Semester):

  • EC 562: Digital Design and Modeling with VHDL
  • EC 596: Sensor Systems Lab. II

Session 2017-18 (Odd Semester):

  • EO 301: Digital Circuits and Systems

Session 2016-17 (Even Semester)​​​​​​​:

  • EC 321: Microprocessor Engineering
  • EC 4401/4412A: CAD Lab
  • EC 5236: Digital Design and Modeling with VHDL

Session 2016-17 (Odd Semester)​​​​​​​:

  • EO 301: Digital Circuits and Systems
  • EC 5105: Microprocessor Engineering and Applications

Session 2015-16 (Even Semester)​​​​​​​:

  • EC 4201: LSI & VLSI Design
  • EC 4401/4412A: CAD Lab
  • EC 5236: Digital Design and Modeling with VHDL

Session 2015-16 (Odd Semester)​​​​​​​:

  • EC 3102: Digital Circuits and Systems
  • EC 3302: Digital Circuits Lab
  • EC 5105: Microprocessor Engineering and Applications

Session 2014-15 (Even Semester):

  • EC 3202: Architecture and Organization of Microprocessor Based Systems        
  • EC 4401/ EC4412A: CAD Lab
  • EC 5236: Digital Design and Modeling with VHDL

Session 2014-15 (Odd Semester):

  • EC 2102A/ EC 2110A/ EC 2113A: Electronics and Instrumentation    
  • EC 3201: Digital Circuits Lab
  • EC 5104: Switching Theory and Logic Design
  • EC 5176: Embedded System Lab

Journal Publications: 

Conference Publications:

  • Tanushree Meena and Kishor Sarawadekar, “Effectiveness of ANN, LSTM, and Various Supervised Machine Learning Algorithms on Human Activity Recognition” in 20th IEEE India Council International Conference (INDICON-2023), Hyderabad, December 14-17, 2023, pp. 1013-1017.
  • Bharat Bhushan Upadhyay and Kishor Sarawadekar, “FPGA Implementation of Dehazing Model Based Low-Light Image Enhancement Algorithm”, 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), 2023, Tempe, Arizona, August 6-9, 2023, pp. 836-840.
  • Bharat Kumar and Kishor Sarawadekar, “Small Area Footprint FPGA Architecture for Approximate atan2(a,b) Algorithm” in the 9th IEEE Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering, 2022 (UPCON-2022), Prayagraj, India, December 2-4, 2022, pp. 1-4.
  • Bharat Bhushan Upadhyay, Sumit Kr. Yadav and Kishor Sarawadekar, “VLSI Architecture of Saturation Based Image Dehazing Algorithm and its FPGA Implementation”, 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS), 2022, Fukuoka, Japan, August 7-10, 2022, pp. 1-4.
  • Saripalli Maruthi Kumar Varma and Kishor Sarawadekar, "FPGA Implementation of Modular Multiplication for Cryptographic Applications," in 2022 IEEE Delhi Section Conference (DELCON), New Delhi, India, 2022, pp. 1-6.
  • K. V. Mohan Krishna and Kishor Sarawadekar, “Design of Concurrent Error Detection Techniques for FFT implemented on FPGA platform," in 2021 IEEE 18th India Council International Conference (INDICON), Guwahati, India, 2021, pp. 1-7.
  • Vikram Singh and Kishor Sarawadekar, “Chaos based pseudo random number generator," 2021 IEEE 8th Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON), Dehradun, India, 2021, pp. 1-6
  • Tanushree Meena and Kishor Sarawadekar, “Gender Recognition using in-built Inertial Sensors of Smartphone,” in IEEE Region 10 Conference TENCON 2020, Osaka, Japan, November 16 - 19, 2020, pp. 462-467.
  • Sumit Kr. Yadav and Kishor Sarawadekar, “Steering Kernel-Based Guided Image Filter for Single Image Dehazing,” in IEEE Region 10 Conference TENCON 2020, Osaka, Japan, November 16 - 19, 2020, pp. 444-449.
  • Harsh Srivastava and Kishor Sarawadekar, “A Depthwise Separable Convolution Architecture for CNN Accelerator,” in 2nd IEEE Conference on Applied Signal Processing (ASPCON 2020), October 7-9, 2020, pp. 1-5.
  • Purnendu Mishra and Kishor Sarawadekar, “Fingertips Detection in Egocentric Video Frames using Deep Neural Network,” in the International Conference on Image and Vision Computing New Zealand (IVCNZ), 2-4 Dec 2019.
  • Rahul Pal and Kishor Sarawadekar, “Performance Study of mmWave Beamspace MU-MIMO-NOMA Communication System,” 2019 IEEE International conference on Advanced Networks and Telecommunications Systems (ANTS), GOA, India, December 16-19, 2019, pp. 1-6.   
  • Rahul Pal and Kishor Sarawadekar, “A Cross Entropy Minimization based Beam Selection for Time-Variant mmWave Beamspace MU-MIMO Communication System,” 2019 IEEE International Conference on Advanced Networks and Telecommunications Systems (ANTS), GOA, India, December 16-19, 2019, pp. 1-5.
  • Purnendu Mishra and Kishor Sarawadekar, “Polynomial Learning Rate Policy with Warm Restart for Deep,” in IEEE Region 10 Conference TENCON 2019, Bolgatty, Kochi, Kerala, India, October 17 - 20, 2019, pp. 2087-2092.
  • Sumit Kr. Yadav and Kishor Sarawadekar, “Single Image Dehazing using Adaptive Gamma Correction Method,” in IEEE Region 10 Conference TENCON 2019, Bolgatty, Kochi, Kerala, India, October 17 - 20, 2019, pp. 1752-1757.
  • Rahul Shrivastava and Kishor Sarawadekar, “Multi-Voltage GPIO Design and its Physical Implementation,” in the IEEE Sponsored 4’th International Conference for Convergence in Technology (I2CT) 2018, Mangalore, Karnataka.
  • Jaydeep Banik Mazumdar and Kishor Sarawadekar, “Design and Physical Implementation of a Low Frequency On-Chip Oscillator,” in the 10th International Conference on Information Technology and Electrical Engineering, Bali, Indonesia, July 24-26, 2018, pp. 79-82.
  • Gourav Modanwal and Kishor Sarawadekar, “A Gesture Elicitation Study with Visually Impaired Users,” in the 20th International Conference on Human-Computer Interaction Las Vegas, July 15-20, 2018, Proceedings Part II, pp 54-61.
  • Gourav Modanwal and Kishor Sarawadekar, “A Robust Algorithm for Hand-forearm Segmentation,” in the International Conference on Image and Graphics Processing (ICIGP 2018), Hong Kong, February 24-26, 2018.
  • Subiman Chatterjee and Kishor Sarawadekar, “Constant Throughput HEVC Core Transform Design,” in 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, October 2016.
  • Subiman Chatterjee and Kishor Sarawadekar, “A Low Cost, Constant Throughput and Reusable 8X8 DCT Architecture for HEVC,” in 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, October 2016.
  • Gourav Modanwal and Kishor Sarawadekar, “Development of a New Dactylology and Writing Support System Especially for Blinds,” in 13th International Conference on Computer and Robot Vision, Victoria, British Columbia, Canada, June 2016, pp. 362-369.
  • Kishor Sarawadekar, R. Biswas, and S. Banerjee, “DSC-SRI algorithms for motion blind detection of objects in an ultrasound system,” in The IASTED International Symposia on Imaging and Signal Processing in Healthcare Technology (ISPHT’11), Washington DC, USA, May 2011, pp. 69-76.
  • Kishor Sarawadekar, O. Kulkarni, and S. Banerjee, “VLSI implementation of MQ decoder in JPEG 2000,” in IEEE Students’ Technology Symposium (TechSym’11), IIT Kharagpur, India, Jan. 2011, pp. 193-197.
  • Kishor Sarawadekar and S. Banerjee, “Low-cost, high-performance VLSI design of an MQ coder for JPEG 2000,” in 10th IEEE International Conference on Signal Processing (ICSP’10), Beijing, China, Oct. 2010, pp. 397–400.
  • Kishor Sarawadekar and S. Banerjee, “Area efficient, high-speed VLSI design for EBCOT block coder in JPEG 2000,” in IEEE International Conference on Electronics and Information Engineering (ICEIE’10), Kyoto, Japan, Aug. 2010, pp. V2–110–V2–113.
  • Kishor Sarawadekar and S. Banerjee, “Efficient VLSI architecture for bit plane encoder of JPEG 2000,” in IEEE International Conference on Image Processing (ICIP’09), Cairo, Egypt, Nov. 2009, pp. 2805 – 2808.
  • Kishor Sarawadekar and S. Banerjee, “A high speed bit plane coder for JPEG 2000 and its FPGA implementation,” in 17th European Signal Processing Conference (EUSIPCO’09), Glasgow, Scotland, Aug. 2009, pp. 2231 – 2234.

Indian Patents:

  • Kishor Sarawadekar, “A smart wearable system for contactless goniometric measurements,” Patent Application No.: 202211002923, Filed on January 18, 2022
  • Kishor Sarawadekar and Gourav Modanwal, “A method and system for interacting with computers or other electronic systems based on dactylology and reduced shape signature,” Indian Patent Pending, Patent Application No. 4114/DEL/2015, Filed on 15'th December, 2015.

Book:

  • R. P. Jain and Kishor Sarawadekar, “Modern Digital Electronics” McGraw Hill Education (India) Private Limited, Fifth Edition.

Book Chapter:

  • Rahul Pal, Gourav Modanwal, Subiman Chatterjee and Kishor Sarawadekar, “Hybrid Beamforming for Secured mmWave MIMO Communication” in: O. Kaiwartya, K. Kaushik, S.K. Gupta, A. Mishra, M. Kumar, (eds) Security and Privacy in Cyberspace, Blockchain Technologies, Springer, Singapore. https://doi.org/10.1007/978-981-19-1960-2_11
  • Member of Executive Committee, IEEE UP Section, January 2021 - December 2023.
  • Convener, Technical Workshop/Seminar/Webinar Sub-Committee, IEEE UP Section’s executive committee, January 2021 - December 2023.
  • Member, Board of Studies in the Subject of Electronics & Telecommunication Engineering, MGM University, Aurangabad, Since March 2023
  • Member, Board of Studies, G.H. Raisoni Institute of Business Management, Jalgaon, Since Sept. 2020.
  • Chief Guest, AICTE sponsored two weeks FDP on “Emerging Trends in Deep Learning and Its Applications” organized by Department of Computer Engineering, Dr. D.Y. Patil Institute of Technology, Pimpri, Pune, July 2020.
  • Invited Expert, AICTE's Clean and Smart Campus Award 2019, September 4-12, 2019.
  • Invited Expert, Research Symposium, at SGGS Institute of Engineering and Technology, Nanded, Maharashtra, July 8-9, 2019.
  • Member, Institutional Ethics Committee, Homi Bhabha Cancer Hospital, Varanasi, April 2019 - April 2020.
  • Advisory board member, in "International Conference on Advances in Engineering Sciences, Management and Technology" (ICAESMT-2019), December- 2019 organised by SBJITMR Nagpur.
  • Member, Doctoral Committee for a Research Scholar at the SRM University, Chennai since January, 2017.
  • Keynote Speaker and Session Chair in the International Conference on Cognitive Informatics and Soft Computing held at VBIT, Ghatkesar, Hyderabad, December 20-21, 2017.
  • TPC Member, IEEE International Symposium on Nanoelectronic and Information Systems (IEEE-iNIS), Gwalior, India, December 19-21, 2016.
  • Session Chair, Digital Integrated Circuits 2 Track, 2016 IEEE 59th Midwest Symposium on Circuits and Systems (MWCAS), Abu Dhabi, UAE.
  • Member, Board of Studies in Electronics, Industrial Electronics and Applied Electronics at the Sant Gadge Baba Amravati University, Amravati, Maharashtra, September 1, 2012 – July 08, 2015. 
  • Invited Speaker, “Logic synthesis,” in Workshop on RTL to GDS-II using Synopsys Tool using EDA tools, Indian Institute of Technology Jammu, May 15, 2024.
  • Invited Speaker, “FPGA Architecture and Design Implementation,” Skill Development Program in Electronics, at Shri Mata Vaishno Devi University, Katra, J&K, March 14, 2024.
  • Invited Speaker, “RTL Design and Synthesis of Algorithms,” in Workshop on RISC-V & VLSI chip design flow using EDA tools, NIT, Jamshedpur, Feb. 18, 2024.
  • Invited Speaker, “Ultrasound Imaging and Signal Processing,” in Karyashala (High-end Workshops) on Emerging Devices, Circuits & Systems for Next Generation Biomedical Applications, NIT Rourkela, July 12, 2023.
  • Invited Speaker, “Signal Processing: Algorithms to VLSI Architecture Perspective,” in Karyashala (High-end Workshops) on Image Processing and its Application using VLSI Architectures, Dhirubhai Ambani Institute of Information and Communication Technology (DA-IICT), Gandhinagar, July 6, 2023.
  • Expert Talk, “Algorithms to Architecture” in IEEE technically co-sponsored One month summer training program on VLSI design (STPVD-2023), IIIT Allahabad, June 28, 2023
  • Expert Talk, “Applications of signal processing,” in G. H. Raisoni college of Engineering, Nagpur, October 7, 2023.
  • Keynote Speaker, “Gesture Recognition Based Human Computer Interaction,” in 6th International Conference on Computing Communication Control and Automation (ICCUBEA-2022), Pimpri Chinchwad College of Engineering, Pune, August 27, 2023.
  • Invited Speaker, "Verilog HDL and Digital System Design" in Karyashala (High-end Workshops) on Analog and Digital VLSI Design Flow and Embedded System Design, NIT Rourkela, 6th July 2022.
  • Invited Speaker, "Biomedical Signal and Image Processing," in 4th Conference on “Innovative Global Trends in Technology, Architecture, Management and Education” MIT ADT University, Pune, 27th April 2022.
  • Invited Speaker, "Low Power Multiplier Architectures," Faculty Development Program on "ASIC Design Flow: Low Power Perspective" in association with E & ICT Academy, NIT Warangal, 12th July, 2021.
  • Invited Speaker, "Introduction to High Efficiency Video Coding Standard", National Conference on Innovation Global trends in Technology, Architecture and Management, MIT ADT University, Pune, 5th May, 2021.
  • Expert Talk, "FPGA based Image Processing", in AICTE sponsored One-week Online Short Term Training Program on “Trends for Industry 4.0 Beyond 2020: Electronics Engineering Perspective” J.C.Bose University of science and Technology, YMCA, Faridabad, 17th March, 2021, 
  • Invited Expert, National Level workshop on "HDL Coding, Simulation and Career Opportunities in VLSI", University College of Engineering, Kakatiya University, Kothagudem, December 23-24, 2020.
  • Invited Speaker, "Career Opportunities in EDA Industry", KIT's College of Engineering, Kolhapur, September 15, 2020.
  • Invited Expert, "Interactive session with the Ph. D. Scholars", Rajiv Gandhi Proudyogiki Vishwavidyalya, Bhopal, State Technological University of Madhya Pradesh, September 12, 2020.
  • Webinar, "Career Opportunities in EDA Industry", Ramrao Adik Institute of Technology, Nerul, Navi Mumbai, July 13, 2020.
  • Invited Expert, "Writing Documents in LaTeX", MES Pillai College of Engineering, New Panvel, April 30, 2020.
  • Invited Speaker, “Serial Communication Protocols", in the Faculty Development Program on Smart Devices and Intelligent Systems at the Rajkiya Engineering College, Sonbhadra, Uttar Pradesh, January 27-31, 2020. 
  • Invited Speaker, “HEVC Algorithm and its Core Transform Architectures”, IEEE Signal Processing Society Kharagpur Section Chapter, Department of Electrical Engineering, 13 August, 2019
  • Invited Speaker, "Perspectives of Verilog HDL and Verilog for Digital Design", in the Faculty Development Program on Digital VLSI Design and Verification at S. B. Jain Institute of Technology, Management & Research, Nagpur, 31 May, 2019.       .
  • Invited Speaker, "Verilog HDL & Digital System Design", in the TEQIP III sponsored Workshop on Modeling & Simulation in Ultra Low Power VLSI Design at Shri Mata Vaishno Devi University, Katra (J&K), May 21-22, 2019.
  • Invited Speaker, "Introduction to Verilog HDL and Digital System Design", in the TEQIP III sponsored three days Workshop on FPGA based System Design at Aligarh Muslim University, Aligarh, 29 April to 1 May 2019.
  • Invited Speaker (for initial two days), "Introduction to High Efficiency Video Coding Algorithm and VLSI Design of the Core Transform used in it", in TEQIP-III sponsored Five Day Short Term Training Program on Algorithms and Architectures for High Efficiency Video Processing Systems, at NIT Surathkal, Karnataka, August 20-24, 2018.
  • Expert Lecture, “ZynQ Architecture and AXI Interconnect,” in TEQIP-III sponsored one-week FDP on Emerging Issues in VLSI Design, at Shri Mata Vaishno Devi University, Katra, J&K, May 7-11, 2018.
  • Invited Speech, “Towards hand gesture based writing support system for blinds,” The 4th Annual Global Congress of Knowledge Economy-2017, Qingdao, China,  September 19-21, 2017.
  • Invited Speaker, “Selecting the Right Processing Platform for Medical Applications,” 11th world Congress of Regenerative Medicine and Stem Cell (RMSC-2017), Singapore, November 14-16, 2017.
  • Keynote Speaker, "Cognitive Informatics and Soft Computing," in the International Conference on Cognitive Informatics and Soft Computing held at VBIT, Ghatkesar, Hyderabad, December 20-21, 2017.
  • Invited Talk, “Scientific Writing using LaTeX” in a UGC-Sponsored Workshop, at Shri Mata Vaishno Devi University, Katra, J&K, February 24, 2017.
  • Invited Expert (for initial four days) in a workshop on “Smart Embedded VLSI System and Hands on Training,” Shivaji University, Kolhapur, Maharashtra (September 29 to October 5, 2016).
  • Invited Expert (for initial four days) “FPGA Implementation and VLSI for Image Processing,” in a National two week STTP on “Recent Trends in VLSI and Embedded Systems” held at MIT’s College of Engineering, Pune, June 27-30, 2016.
  • Invited Talk, “FPGA Architecture,” Shri Sant Gajanan Maharaj College of Engineering, Shegaon, Maharashtra, August 27, 2015
  • Invited Expert Lecture, “FPGA Architecture,” HVPM’s College of Engineering, Amaravati, Maharashtra, August 28, 2015
  • Invited Expert, Research Symposium-II, at SGGS Institute of Engineering and Technology, Nanded, Maharashtra, July 25-26, 2015.

Short Term Courses Conducted:

  • SERB funded Karyashala High-End workshop “VLSI Architectures for Signal and Image Processing” December 17-23, 2022. 
  • Coordinated AICTE Sponsored Online QIP Short Term Course on "IoT-enabled 5G Networks: Infrastructure and Security," January 25-30, 2021.
  • AICTE Training and Learning (ATAL) Academy sponsored one week FDP on "Internet of Things and Real Time Applications," September 21-25, 2020.
  • AICTE Sponsored Short Term Course (and CEP) on "HDL for Signal, Image and Video Processing (HSIVP)," August 21 - 26, 2017.
  • Faculty Development Programme on "VHDL Syntax and Applications," in Jawaharlal Darda Institute of Engineering and Technology, Yatmal, Maharashtra, June 8-12, 2015.

General Administration:

  • Member, Anti-Ragging Squad, Since August 2024
  • Deputy Coordinator, Training and Placement Cell, Since August 2022.
  • Convener, Departmental Post Graduate Committee, Since September 2023
  • President, Faculty Forum, November 2021 - November 2022
  • Nodal Officer, Visvesvaraya PhD Scheme, Ministry of Electronics and Information Technology, New Delhi, December 2014-February 2023
  • Co-Chief Investigator, Special Manpower Development Programme for Chips to System Design (SMDP-C2SD), Ministry of Electronics and Information Technology, New Delhi, April 2017-August 2022
  • Member, Organizing Committee, Leadership Development in Higher Education Institutions (HEIs) under Leadership for Academic Program (LEAP) of MHRD, September 2018 - September 2019
  • Member, Institute Core Courses Monitoring Committee for UGD/IDD/B.Arch. Programmes, Since August 2020
  • Member, Departmental Post Graduate Committee, Academic Year 2020-21
  • Dean’s Nominee, Project Staff Selection Committee, Since June 2018
  • Member, Institute Research Project/Grant to Individual Faculty Scheme, Since December 2017
  • Member, Department Level R & D Committee, Since June 2019
  • Member, Mess and Canteen allotment Committee, Academic Year 2019-20
  • Member, Departmental Physical Verification Committee, Since August 2015
  • Faculty Instructor, Turnitin Software, Since October 2016
  • Administrative Warden, Morvi Hostel, September 2018 to March 2021
  • Convener, Departmental Under Graduate Committee, September 2018 to August 2020
  • Treasurer, Faculty Forum, August, 2018 to October, 2019
  • Member, Departmental Post Graduate Committee, Academic Year 2017-18
  • Member, Projected Annual Expenditure Plan from Department Development Fund of Special Fund, Academic Year 2016-18
  • Member, Departmental Purchase Committee, Financial Year 2016-17
  • Warden, Morvi Hostel, November 2014 to September 2016
  • Chairman, User Group-Cum-Monitoring Committee, Academic Year 2016-17
  • Member, Departmental New Curriculum Committee, Academic Year 2014-15
  • Member, Departmental Library Committee, Academic Year 2014-15
  • Vice President, Departmental Electronics Engineering Society, Academic Year 2014-17
  • Member, Departmental Under Graduate Committee, Academic Year 2015-17
  • Member, Finance Committee, 2020 URSI Regional Conference on Radio Science (URSI-RCRS 2020), 2019
  • General Chair and Organizing Secretary, International Conference on Distributed Computing and Networking (ICDCN), 2018



M.Tech.

  • Ananya Srivastava
  • Bandaru Srinivasa Rao
  • Chennupalli Venkata Madhuri
  • Jayesh Kumar

Ph.D. 

2. Niranjan Kumar Nirala
1. Bharat Bhushan

Ph.D. 

6. Tanushree Meena (Defended on August 01, 2024)

5. Purnendu Mishra (Defended on April 24, 2024)

4. Sumit Kumar Yadav (Defended on April 08, 2024)

3. Rahul Pal (Defended on July 07, 2020)

2. Subiman Chatterjee (Defended on October 24, 2019)

1. Gourav Modanwal​​​ (Defended on March 02, 2019)

M.Tech.

2024
38. Saini Komal Krishna
37. Rahul Chauhan
36. Sudeshna Das 
35. Shivanand Tripathi
34. Subrateshvar Kumar Dwivedi

2023
33. Chinta Badari Nagasai
32. Vemanaboina Vamsi
31. Hash Kashyap

2022
30. Amrit Lal
29. Vishal Goyal
28. Anirban Dutta
27. Bharat Kumar

2021
26. Vikram Singh
25. Alvin Augustine
24. Kaza Venkata Mohan Krishna
23. Saripalli Maruthi Kumar Varma
22. Valluri Nikhil Chandra 
21. Chandra Prakash Singh (Co-Supervisor)

2020
20. Tanveer Singh Behl
19. Sandeep Chaurasia
18. Harshit Singh
17. Deepti Dewangan
16.​ Abhishek Gupta
15. Vijay Kant Tripathi

2019
14. Navin Bhaskar (Co-Supervisor)
13. Vimlesh Chaurasia (Co-Supervisor)
12. Abhinav Kumar (Co-Supervisor)
11. Aditya Kumar Agrawal

2018
10. Prashant Kumar Maurya​ (Co-Supervisor)
9. Jaydeep Banik Mazumdar
8. Rahul Shrivastava

2017
7.Bade Pawan Kumar
6.Suresh Kumar Patel
5.Ms. Ankita Suman​ (Banasthali University, Rajasthan)
4.Ms. Ayushi Jain​ (Banasthali University, Rajasthan)

2016
3. Harendra Kumar Netam ​
2. Krishan Mohan Sharma
1. ​Nisha Yadav

Fellowships: 

  • Recipient of Visvesvaraya Young Faculty Research Fellowship for the period of May 2016 to March 2019
  • Sr. Research Fellowship, GE Medical Systems India Private Ltd., Bangalore during research period December 2007 - March 2011

Awards:

  • II’nd place award for best Ph. D. thesis presentation in the Ph. D. forum, VLSI Design and Test Symposium 2012, B.E.S.U., Kolkata
  • Recognized as an "Outstanding Scientist in Electronics Engineering" under the Engineering Discipline by the Venus International Foundation, Chennai

Now three full time PhD positions with research fellowship are available with me.

If you are interested is Digital VLSI Design, VLSI Architecture, FPGA/ASIC implementation of algorithms, you can contact me.

In order to receive the fellowship, you must have qualified GATE in EC in last 5 years.